1. Field of the Invention
The present invention relates to a bipolar transistor and a method of manufacturing the same, and more particularly, to a bipolar transistor in which both of the base and emitter regions are formed in a self-aligned manner.
2. Description of Related Art
To reduce the base resistance and base-collector junction capacitance, SST (super self-aligned technology) is useful as proposed, for example, by S. Konaka et al. entitled "A 30-ps Si Bipolar IC Using Super Self-Aligned Process Technology" in IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. ED-33, NO. 4, APRIL 1986 pp. 526-531. In the SST, a standard aperture having a minimum size (for example, of 1 .mu.m) accomplished by a conventional photo-lithography technology is formed in an insulating film or in a polycrystalline silicon film at an earlier process step in a process for forming the transistor, and the base region including the graft base region and the emitter region are formed in a self-aligned manner by using the standard aperture. Therefore, the base resistance and base-collector junction capacitance can be reduced, and the high-frequency characteristics can be improved. Similar technologies are disclosed in U.S. Pat. No. 4,495,512 by R. D. Issac et al. or in U.S. Pat. No. 4,157,269 by T. H. Ning et al.
In the above-mentioned conventional bipolar transistors, however, the emitter region forms the emitter-base junction capacitance at its side encircling the region as well as at its bottom. Moreover, the graft base region is formed at a position outside the standard aperture in the plan view. Therefore, a limitation is imposed on further reducing the emitter-base junction capacitance, base-collector junction capacitance and base resistance and on improving the highfrequency characteristics such as cut-off frequency characteristic.